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Signal Filtering Techniques for PLC Digital and Analog Inputs in Industrial Automation

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  • 〡 by WUPAMBO
Signal Filtering Techniques for PLC Digital and Analog Inputs in Industrial Automation

Modern industrial automation environments contain heavy electromagnetic interference (EMI), mechanical vibration, and electrical noise. When field sensors transmit noisy raw signals into control systems, programmable logic controllers (PLCs) experience false triggers or erratic process oscillations.

Implementing robust signal filtering techniques protects PLC processing circuits while ensuring stable, predictable factory automation operations. This engineering guide explains how hardware and software filtering work across digital and analog PLC inputs, providing practical algorithms and commissioning best practices.

1. Fundamentals of Signal Filtering in PLC Input Modules

Input filters sit between physical field devices and the core PLC execution engine. Their primary purpose involves stripping out transient spikes, contact bounce, and high-frequency noise while passing genuine process state changes.

Hardware input circuits route incoming field signals through physical RC filter networks before passing data to the optical isolator. Software filtering algorithms then condition the digitalized signals within CPU memory scan cycles.

2. Implementing Time-Based Filters for PLC Digital Inputs

Digital field inputs from limit switches, pushbuttons, and proximity sensors often suffer from mechanical contact bounce. Without filtering, a single button press can generate multiple rapid signal transitions within milliseconds.

Digital filtering operates on a minimum duration threshold parameter, often referred to as input delay or debounce time.

  • The filter ignores any signal state change that fails to persist longer than the set filter time (e.g., 3 ms to 10 ms).
  • High-frequency noise pulses drop out automatically before reaching internal logic memory.
  • Engineers can adjust digital filter settings in hardware configuration settings within Siemens TIA Portal or Rockwell Studio 5000.

In ladder logic, software debouncing mimics this behavior using On-Delay Timers (TON). The output bit sets to TRUE only after the physical input remains continuously HIGH for the entire preset timer duration.

3. Advanced Filtering Methods for PLC Analog Inputs

Unlike binary digital signals, analog inputs (4-20mA, 0-10V, RTDs, thermocouples) vary continuously. Consequently, analog filtering relies on mathematical smoothing algorithms rather than simple time-delays.

Control systems commonly implement moving average filters or First-Order Low-Pass Filters (Single-Pole IIR Filters). The mathematical equation for a digital first-order low-pass filter is:

Y(k) = Y(k-1) + a * [X(k) - Y(k-1)]

Where:

  • Y(k) represents the current filtered output value.
  • Y(k-1) is the previous filtered output value.
  • X(k) is the raw un-filtered analog input value.
  • a represents the smoothing factor (ranging between 0.0 and 1.0).

Increasing the filter smoothing factor dampens signal noise effectively. However, control engineers must balance smoothing strength against phase lag, as excessive filtering delays system response to legitimate process changes.

Field Insight: High filter settings effectively smooth out noisy process curves on HMI screens. Nevertheless, using aggressive filter coefficients on critical safety interlocks or fast motion loops introduces dangerous response delays. Reserve heavy low-pass filtering for slow thermal or level loops, and keep fast control loops responsive.

4. Hardware Filtering vs. Software Algorithm Trade-Offs

Both hardware-level RC networks and CPU software routines provide distinct benefits within factory automation topologies.

Hardware filtering protects sensitive internal optocouplers from high-voltage transients and ESD surges. However, hardware component parameters remain fixed once manufactured on the I/O card.

Software filtering provides flexible, dynamic parameter tuning directly within PLC function blocks. Therefore, modern DCS and PLC designs combine onboard hardware RC protection with configurable software low-pass algorithms for optimal noise rejection.

5. Practical Guidelines for Tuning PLC Input Filters

Calibrating input filters requires analyzing process dynamics and noise profiles during system commissioning:

  1. Digital Inputs: Set hardware debounce delays between 3 ms and 20 ms for mechanical switches. Lower the delay to 0.1 ms for high-speed counter modules tracking incremental encoders.
  2. Temperature Signals (Slow Dynamics): Apply heavy low-pass filtering (smoothing factor a = 0.05 to 0.1) to suppress ambient thermal noise.
  3. Flow and Pressure Loops (Fast Dynamics): Use light filtering (smoothing factor a = 0.3 to 0.5) to maintain loop stability without causing PID phase lag.

Real-World Application Scenario: Slurry Tank Flow Meter Noise Reduction

Problem Statement

A mining beneficiation plant experienced severe hunting in a slurry flow control valve loop. Electrical noise generated by nearby medium-voltage VFDs induced random spikes on the 4-20mA electromagnetic flowmeter signal. The PLC PID block reacted violently to these false spikes, causing control valve oscillation and premature actuator wear.

Solution Architecture

Automation engineers implemented a multi-stage signal conditioning strategy:

  1. Hardware Configuration: Configured the PLC analog input channel hardware filter to Medium (60 Hz rejection mode).
  2. Software Algorithm Implementation: Created a dedicated SCL function block in Siemens TIA Portal implementing a first-order digital low-pass filter with an adjustable alpha constant (a = 0.15).
  3. Signal Validation: Added a spike-rejection algorithm that discards raw sample steps exceeding +/- 20% flow change per millisecond scan.

Operational Results

The filtered process variable curve stabilized completely, suppressing 98% of VFD-induced signal spikes. Smooth input data allowed stable PID loop tuning, reducing control valve mechanical wear and eliminating process hunting.

About the Author

Zhao Gang is a Senior Control Systems Engineer with over 15 years of industrial experience across thermal power plants, chemical processes, and heavy industrial automation. He specializes in PLC/DCS architecture design, signal integrity, noise mitigation, and functional safety compliance (IEC 61508 / IEC 61511).


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