DS200TCCAG1B | GE | Analog Input/Output Module

The GE DS200TCCAG1B, also cataloged as the DS200TCCA Analog I/O Module, operates as a dedicated hardware component for signal conditioning and data acquisition within Mark V turbine control systems.

Hardware Specifications

Backplane Bus Communication and Signal Conditioning

The DS200TCCAG1B utilizes an 80196 microprocessor to manage high-speed data acquisition for RTD, thermocouple, and shaft monitoring circuits. The module ensures deterministic performance through the integration of a programmable logic device and internal PROM memory. Interfacing with the Mark V backplane is achieved via specific terminal board connections, including the CTBA for 4-20 mA current signals and the TBCA for RTD inputs. Cold junction compensation (CJC) and precise channel isolation are implemented within the TCCA circuitry to minimize signal noise and maintain data integrity across the control loop. Firmware compatibility is managed through the functional revision level "B," which distinguishes this card from the parent G1 PCB.

Frequently Asked Questions

Q: Can the factory-configured jumpers be modified during field installation?

A: Only jumper J1 (RS232 enable/disable) is intended for field use. Jumper JP2 is used for card test settings and JP3 is strictly for factory testing; modifying JP2 or JP3 during standard operation will cause system-level diagnostic faults.

Q: Is this module compatible with all Mark V terminal boards?

A: No. The DS200TCCAG1B is specifically designed to interface with the TBQA, TBCA, and CTBA terminal boards. Ensure the physical connections (JAA, JBB, JCC, JDD) are verified against the specific turbine control scheme before initialization.

Field Installation Guidelines

1. Ensure the control cabinet is de-energized prior to inserting the TCCA module into the designated rack slot to prevent bus communication errors or electrical damage to the backplane.
2. Verify that the cable harnesses (e.g., JCC, JDD) are fully seated into the 50-pin connectors to prevent intermittent signal loss from the RTD or thermocouple inputs.
3. Handle the module by the edges and faceplate to prevent electrostatic discharge damage to the onboard logic device and 80196 microprocessor.
4. Perform a system-level check to confirm that the LED indicator on the board edge shows proper initialization status after applying power, indicating the module is correctly synchronized with the Mark V processor.